AMD’s edgiest Epyc chips are officially getting a Zen 5 refresh with the introduction of its 8005-series processors codenamed Sorano.
Announced ahead of Mobile World Congress, the chips replace the House of Zen’s aging Siena Epycs, which were launched in the latter half of 2023 and promise higher core counts alongside a slew of micro-architectural improvements, including a full-fat 512-bit data path for vector instructions.
Sorano will be available with up to 84 Zen 5 cores — up from 64 on Siena — in a power envelope of just 225 watts.
AMD isn’t ready to spill all the beans on its latest Epyc just yet, but based on core count alone, we surmise the chip will either feature six density-optimized Zen 5c chiplets with 14 of 16 cores enabled or 12 of the frequency-optimized Zen 5 variety with one of the eight cores fused off.
Considering the major efficiency gains AMD managed to eke out in the Zen 5 generation, we wouldn’t be surprised to see AMD opt for its higher-clocking chiplets this time around.
Much like its predecessor, Sorano is designed for telco and edge applications like virtual radio access network (vRAN).
RAN has traditionally relied on boutique hardware from the likes of Samsung, Nokia, and Ericsson, but with the rise of 5G, they’ve increasingly been virtualized so they can run on conventional server kit.
While vRAN can certainly run on off-the-shelf Epycs and Xeons, both AMD and Intel have developed specialized chips specifically for this market.
Sorano is designed to operate in a wider range of temperature regimes, which is often required for the kinds of NEBS compliant systems commonly employed by telcos.
Sorano also introduces optimizations for low-density parity check (LDPC) decoding operations, which aim to reduce latency and speed up forward error correction in 5G networks.
As AMD explains it: by handling LDPC decoding more efficiently, the chips are able to “free compute resources for additional Layer 1 and Layer 2 processing, helping operators support more functions per server.”
AMD’s one-two punch of high-core count and low power consumption — if Sorano is anything like Siena, we’ll see versions of the chip with TDPs under 100 watts — has caught the attention of telecom equipment makers including Samsung, Ericsson, and Wind River.
However, AMD isn’t the only player in this space. Sorano will have to contend with Intel’s Xeon 6E and Xeon 6 SoC platforms, which take an entirely different approach to RAN applications.
Nokia, a long-time Intel partner, is using Chipzilla’s Xeon 6700E processors to power its core network appliances. We covered these parts in more detail back in 2024, but they can be had with up to 144 of Intel’s stripped down efficiency cores, which trade clock speeds and features like AVX-512 and AMX for greater core density.
Intel’s Xeon 6 SoC meanwhile is designed for vRAN deployments at the edge. The chips pack up to 42 cores and can be had with the chipmaker’s vRAN-Boost tech — dedicated hardware accelerators for operations commonly seen in 5G deployments — along with 200 Gbps of onboard Ethernet networking and acceleration for crypto, AI, and media transcoding. Ericsson is among those deploying Intel’s Xeon 6 SoC processors in its customer networks.
We expect to get more information on AMD’s full Sorano lineup later this year.
The chip will likely be the last major addition to AMD’s Zen 5 Epyc lineup as the chip designer has already announced its next-gen Venice CPUs. Those parts will be available with up to 256 Zen 6 cores per socket. AMD has also teased a Venice-X processor for high-performance computing, which will presumably use its 3D V-Cache tech to boost L3 cache to well over a gigabyte.
Venice is set to make its debut in the second half of 2026. ®